5762 search results - page 297 / 1153 » R-tree: A Hardware Implementation |
216
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DDECS
2009
IEEE
16 years 1 months ago
2009
IEEE
— We propose a novel synthesis method of a dual-rail asynchronous two-level logic of reduced cost. It is based on a model that operates under so called modified weak constraints....
161
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DATE
2008
IEEE
16 years 1 months ago
2008
IEEE
In this paper, we use the generalized binary de Bruijn (GBDB) graph as a scalable and efficient network topology for an on-chip communication network. Using just two-layer wiring,...
148
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DATE
2008
IEEE
16 years 1 months ago
2008
IEEE
This paper presents the implementation and experimental characterization of a reconfigurable ΣΔ modulator intended for multi-mode wireless receivers that is capable to perform t...
149
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ECBS
2008
IEEE
16 years 1 months ago
2008
IEEE
Software systems have to provide flexibility by implementing variability. Existing design methodologies do not support means for optimizing the design for variability and for mea...
168
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ISCAS
2008
IEEE
16 years 1 months ago
2008
IEEE
C-based design techniques and methodologies have been proposed to tackle the complexity of heterogeneous embedded systems. The heterogeneity comes in the functionalities and the im...