5762 search results - page 291 / 1153 » R-tree: A Hardware Implementation |
141
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ISCAS
1999
IEEE
15 years 11 months ago
1999
IEEE
In this paper, we present a new method for verifying the realizability of a timing diagram with linear timing constraints, thus ensuring that the implementation of the underlying ...
143
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ISLPED
1998
ACM
15 years 11 months ago
1998
ACM
Adiabatic logic promises extremely low power consumption for those applications where slower clock rates are acceptable. However, there have been very few adiabatic memory designs...
163
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CARDIS
1998
Springer
15 years 11 months ago
1998
Springer
In this paper we present the block cipher Rijndael, which is one of the fifteen candidate algorithms for the Advanced Encryption Standard (AES). We show that the cipher can be impl...
169
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ASAP
1997
IEEE
15 years 11 months ago
1997
IEEE
This paper presents a method, based on the formalism of affine recurrence equations, for the synthesis of digital circuits exploiting parallelism at the bit-level. In the initial ...
164
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ISCAS
1993
IEEE
15 years 10 months ago
1993
IEEE
An algorithm is presented for fast implementation of time-varying wavelet packets maintaining perfect reconstruction throughout transitions. It is based on filter banks known as t...