Sciweavers

5762 search results - page 286 / 1153
» R-tree: A Hardware Implementation
Sort
View
DATE
1999
IEEE
89views Hardware» more  DATE 1999»
15 years 11 months ago
A Methodology and Design Environment for DSP ASIC Fixed-Point Refinement
Complex signal processing algorithms are specified in floating point precision. When their hardware implementation requires fixed point precision, type refinement is needed. The p...
Radim Cmar, Luc Rijnders, Patrick Schaumont, Serge...
FPL
1998
Springer
107views Hardware» more  FPL 1998»
15 years 11 months ago
Modular Exponent Realization on FPGAs
The article describes modular exponent calculations used widely in cryptographic key exchange protocols. The measures for hardware consumption and execution speed based on argument...
Juri Põldre, Kalle Tammemäe, Marek Man...
ASAP
2004
IEEE
99views Hardware» more  ASAP 2004»
15 years 10 months ago
Complex Square Root with Operand Prescaling
We propose a radix-r digit-recurrence algorithm for complex square-root. The operand is prescaled to allow the selection of square-root digits by rounding of the residual. This lea...
Milos D. Ercegovac, Jean-Michel Muller
DATE
2004
IEEE
126views Hardware» more  DATE 2004»
15 years 10 months ago
GRAAL - A Development Framework for Embedded Graphics Accelerators
This paper presents a versatile hardware/software cosimulation and co-design environment for embedded 3D graphics accelerators. The GRAphics AcceLerator design exploration framewo...
Dan Crisu, Sorin Cotofana, Stamatis Vassiliadis, P...
FPL
2006
Springer
80views Hardware» more  FPL 2006»
15 years 10 months ago
A Compiler Intermediate Representation for Reconfigurable Fabrics
An intermediate representation (IR) is a central structure around which tools such as compilers and synthesis tools are built. In this paper we propose such an IR specifically des...
Zhi Guo, Walid A. Najjar