5762 search results - page 251 / 1153 » R-tree: A Hardware Implementation |
141
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ISCAS
2005
IEEE
16 years 7 days ago
2005
IEEE
A real-timehigh-performanceand fault-tolerantFPGA-based hardware architecture for the processing of synthetic apertureradar (SAR) images has been developed for advanced spaceborner...
156
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DATE
2003
IEEE
15 years 12 months ago
2003
IEEE
This paper describes the NPSE, a high-performance SRAM-based network packet search engine which has the primary application of supporting IPv4 and IPv6 forwarding. It is based on ...
156
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VLSI
2007
Springer
16 years 22 days ago
2007
Springer
In this paper, we present an efficient H.264 / MPEG4 Part 10 Intra Frame Coder System. The system achieves real-time performance for portable applications with low hardware cost, ...
146
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FCCM
2005
IEEE
16 years 7 days ago
2005
IEEE
This paper presents a processor and memory-hierarchy prototype based on FPGAs that provides hardware support for program rollback. We use this prototype to demonstrate how compile...
193
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FPL
2005
Springer
16 years 5 days ago
2005
Springer
Abstract. We propose CUSTARD — CUStomisable Threaded ARchitecture — a soft processor design space that combines support for multiple hardware threads and automatically generate...