5762 search results - page 208 / 1153 » R-tree: A Hardware Implementation |
151
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ISCAS
2003
IEEE
15 years 12 months ago
2003
IEEE
In this paper, we use a digital signal processor (DSP) to implement a real-time H.263+ codec. We use fast algorithms to reduce the codec computational complexity. Furthermore, the...
164
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APCSAC
2000
IEEE
15 years 11 months ago
2000
IEEE
Hardware square-root units require large numbers of gates even for iterative implementations. In this paper, we present four low-cost high-performance fullypipelined n-select impl...
153
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PARELEC
2000
IEEE
15 years 11 months ago
2000
IEEE
The purpose of this paper is to demonstrate the implementation of an adaptable parallel architecture capable of system to task adaptation. The system implementation was based on X...
164
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IPPS
1999
IEEE
15 years 11 months ago
1999
IEEE
Abstract. This paper proposes a method for implementing fractal image compression on dynamically reconfigurable architecture. In the encoding of this compression, metric computatio...
182
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SBRN
1998
IEEE
15 years 10 months ago
1998
IEEE
As the demand for higher performance computers for the processing of remote sensing science algorithms increases, the need to investigate new computing paradigms is justified. Fie...