- This paper presents an H.264/AVC baseline profile decoder based on a SoC platform design methodology. The overall decoding throughput is increased by optimized software and a ded...
Suh Ho Lee, Ji Hwan Park, Seon Wook Kim, Sung Jea ...
The register file is a power-hungry device in modern architectures. Current research on compiler technology and computer architectures encourages the implementation of larger dev...
The two-layered distributed clustered server architecture consisting of a control server and a group of storage servers has been widely used to support multimedia file systems. Wi...
Seung-Ho Park, Si-Yong Park, Gwang Moon Kim, Ki-Do...
Abstract-- This paper describes the stochastic model order reduction algorithm via stochastic Hermite Polynomials from the practical implementation perspective. Comparing with exis...
Yi Zou, Yici Cai, Qiang Zhou, Xianlong Hong, Sheld...
Abstract. A delay-insensitive module communicates with its environment through wires of unbounded delay. To avoid transmission interference, the absorption of a signal transition m...
Hemangee K. Kapoor, Mark B. Josephs, Dennis P. Fur...