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FPL
2006
Springer
108views Hardware» more  FPL 2006»
15 years 10 months ago
Implementation of Network Application Layer Parser for Multiple TCP/IP Flows in Reconfigurable Devices
This paper presents an implementation of a high-performance network application layer parser in FPGAs. At the core of the architecture resides a pattern matcher and a parser. The ...
James Moscola, Young H. Cho, John W. Lockwood
MICRO
2000
IEEE
107views Hardware» more  MICRO 2000»
15 years 10 months ago
Register integration: a simple and efficient implementation of squash reuse
Register integration (or simply integration) is a mechanism for incorporating speculative results directly into a sequential execution using data-dependence relationships. In this...
Amir Roth, Gurindar S. Sohi
ICVGIP
2008
15 years 8 months ago
Implementation of the "Local Rank Differences" Image Feature Using SIMD Instructions of CPU
Usage of statistical classifiers, namely AdaBoost and its modifications, in object detection and pattern recognition is a contemporary and popular trend. The computatiponal perfor...
Adam Herout, Pavel Zemcík, Roman Jurá...
EGITALY
2006
15 years 8 months ago
Implementing mesh-based approaches for deformable objects on GPU
These latest years witnessed an impressive improvement of graphics hardware both in terms of features and in terms of computational power. This improvement can be easily observed ...
Guido Ranzuglia, Paolo Cignoni, Fabio Ganovelli, R...
USENIX
2003
15 years 8 months ago
Design and Implementation of Power-Aware Virtual Memory
Despite constant improvements in fabrication technology, hardware components are consuming more power than ever. With the everincreasing demand for higher performance in highly-in...
Hai Huang, Padmanabhan Pillai, Kang G. Shin