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IPPS
2000
IEEE
15 years 11 months ago
A Novel Superscalar Architecture for Fast DCT Implementation
This paper presents a new superscalar architecture for fast discrete cosine transform (DCT). Comparing with the general SIMD architecture, it speeds up the DCT computation by a fac...
Zhang Yong, Min Zhang
ICASSP
2010
IEEE
15 years 6 months ago
Implementing LNS using filtering units of GPUs
Current GPUs offer specialized graphics hardware in addition to generic floating-point processing units. We propose a method which reuses specialized texture filtering units to ...
Mark G. Arnold, Sylvain Collange, David Defour
ECMDAFA
2010
Springer
138views Hardware» more  ECMDAFA 2010»
15 years 4 months ago
A UML 2.0 Profile to Model Block Cipher Algorithms
Abstract. Current mobile digital communication systems must implement rigorous operations to guarantee high levels of confidentiality and integrity during transmission of critical ...
Tomás Balderas-Contreras, Gustavo Rodr&iacu...
FPL
2010
Springer
210views Hardware» more  FPL 2010»
15 years 4 months ago
A Compact Transactional Memory Multiprocessor System on FPGA
In this paper we present a rapid prototyping platform on a single Field Programmable Gate Array (FPGA) with support for software transactional memory. The system is composed only b...
Matteo Pusceddu, Simone Ceccolini, Gianluca Palerm...
PROCEDIA
2010
138views more  PROCEDIA 2010»
15 years 1 months ago
Using the reconfigurable massively parallel architecture COPACOBANA 5000 for applications in bioinformatics
Currently several computational problems require high processing power to handle huge amounts of data, although underlying core algorithms appear to be rather simple. Especially i...
Lars Wienbrandt, Stefan Baumgart, Jost Bissel, Car...