5762 search results - page 183 / 1153 » R-tree: A Hardware Implementation |
107
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ASAP
2007
IEEE
15 years 10 months ago
2007
IEEE
Dynamic reconfiguration allows to selectively substitute blocks of logic at run-time in order to improve the area efficiency of a FPGA design. This paper presents the design of a ...
187
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FPL
2006
Springer
15 years 10 months ago
2006
Springer
This work shows a modular architecture based on FPGA's to solve the eigenvalue problem according to the Jacobi method. This method is able to solve the eigenvalues and eigenv...
144
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ICCD
1995
IEEE
15 years 10 months ago
1995
IEEE
STARI is a high-speed signaling technique that uses both synchronous and self-timed circuits. To demonstrate STARI, a chip has been fabricated using the MOSIS 2 CMOS process. In a...
168
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DATE
2007
IEEE
15 years 6 months ago
2007
IEEE
Multiple Input - Multiple Output (MIMO) wireless technology involves highly complex vectors and matrix computations which are directly related to increased power and area consumpt...
179
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ICCAD
2010
IEEE
15 years 4 months ago
2010
IEEE
For a variety of signal processing applications polynomials are implemented in circuits. Recent work on polynomial datapath optimization achieved significant reductions of hardware...