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ASPDAC
2007
ACM
156views Hardware» more  ASPDAC 2007»
15 years 10 months ago
Implementation of a Real Time Programmable Encoder for Low Density Parity Check Code on a Reconfigurable Instruction Cell Archit
- This paper presents a real time programmable irregular Low Density Parity Check (LDPC) Encoder as specified in the IEEE P802.16E/D7 standard. The encoder is programmable for fram...
Zahid Khan, Tughrul Arslan
ASPDAC
2004
ACM
103views Hardware» more  ASPDAC 2004»
15 years 10 months ago
Design and implementation of a secret key steganographic micro-architecture employing FPGA
In the well-known "prisoners' problem", a representative example of steganography, two persons attempt to communicate covertly without alerting the warden. One appr...
Hala A. Farouk, Magdy Saeb
ARCS
2006
Springer
15 years 10 months ago
Prototypical Implementation of Location-Aware Services Based on Super-Distributed RFID Tags
Abstract. We provide evidence of the feasibility and effectiveness of a middleware architecture for mobile devices which employs dense distributions of small computerized entities ...
Jürgen Bohn
ASAP
2006
IEEE
138views Hardware» more  ASAP 2006»
15 years 10 months ago
Configurable, High Throughput, Irregular LDPC Decoder Architecture: Tradeoff Analysis and Implementation
Low Density Parity Check (LDPC) codes are one of the best error correcting codes that enable the future generations of wireless devices to achieve higher data rates. This paper pr...
Marjan Karkooti, Predrag Radosavljevic, Joseph R. ...
AICCSA
2001
IEEE
112views Hardware» more  AICCSA 2001»
15 years 10 months ago
Implementation of DDARC: Software Architecture for Debugging Distributed Programs
Debugging and testing is a larger part of the effort spent in a software development cycle. Debugging a program is time consuming and is a continuous cycle of code modification an...
Sushma Rai, D. Sampath, Srivathsa N. S.