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ICCAD
2005
IEEE
93views Hardware» more  ICCAD 2005»
16 years 3 months ago
Eliminating wire crossings for molecular quantum-dot cellular automata implementation
— When exploring computing elements made from technologies other than CMOS, it is imperative to investigate the effects of physical implementation constraints. This paper focuses...
Amitabh Chaudhary, Danny Z. Chen, Kevin Whitton, M...
DATE
2009
IEEE
143views Hardware» more  DATE 2009»
16 years 1 months ago
Time and memory tradeoffs in the implementation of AUTOSAR components
—The adoption of AUTOSAR in the development of automotive electronics can increase the portability and reuse of functional components. Inside each component, the behavior is repr...
Alberto Ferrari, Marco Di Natale, Giacomo Gentile,...
DATE
2008
IEEE
81views Hardware» more  DATE 2008»
16 years 29 days ago
Practical Implementation of a Network Analyzer for Analog BIST Applications
This paper presents a practical implementation of a network analyzer for analog BIST applications. The network analyzer consists of a sinewave generator and a sinewave evaluator b...
Manuel J. Barragan Asian, Diego Vázquez, Ad...
DATE
2007
IEEE
134views Hardware» more  DATE 2007»
16 years 26 days ago
Non-fractional parallelism in LDPC decoder implementations
Because of its excellent bit-error-rate performance, the Low-Density Parity-Check (LDPC) decoding algorithm is gaining increased attention in communication standards and literatur...
John Dielissen, Andries Hekstra
DSD
2007
IEEE
88views Hardware» more  DSD 2007»
16 years 26 days ago
An Implementation of an Address Generator Using Hash Memories
An address generator produces a unique address from 1 to k for the input that matches to one of k registered vectors, and produces 0 for other inputs. This paper presents the supe...
Tsutomu Sasao, Munehiro Matsuura