5762 search results - page 174 / 1153 » R-tree: A Hardware Implementation |
180
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DATE
2003
IEEE
15 years 11 months ago
2003
IEEE
In this paper, we propose an optimized real-time MPEG-2 video decoder. The decoder has been implemented in one FPGA device as a HW/SW partitioned system. We made time/power-consum...
177
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DATE
2010
IEEE
15 years 11 months ago
2010
IEEE
The release of general purpose GPU programming environments has garnered universal access to computing performance that was once only available to super-computers. The availability...
172
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FCCM
2002
IEEE
15 years 11 months ago
2002
IEEE
This paper presents an FPGA-based design and implementation of a three dimensional (3D) triangle mesh decompressor. Triangle mesh is the dominant representation of 3D geometric mo...
148
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ISLPED
1995
ACM
15 years 10 months ago
1995
ACM
We present a technique that automatically synthesizes nite state machines with gated clocks to reduce the power dissipation of the nal implementation. We describe a new transfor...
177
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DATE
2009
IEEE
16 years 1 months ago
2009
IEEE
—This paper presents a novel VLSI implementation of a MIMO detector for OFDM systems. The proposed architecture is able to perform both linear MMSE and reduced latticeaided MIMO ...