5762 search results - page 171 / 1153 » R-tree: A Hardware Implementation |
164
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IPPS
1999
IEEE
15 years 10 months ago
1999
IEEE
An e cient implementations of the main building block in the RSA cryptographic scheme is achieved by mapping a bit-level systolic array for modular exponentiation onto Xilinx FPGAs...
191
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DATE
2004
IEEE
15 years 10 months ago
2004
IEEE
Architecture description languages are widely used to perform architecture exploration for application-driven designs, whereas the RT-level is the commonly accepted level for hard...
156
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ICCD
2004
IEEE
16 years 3 months ago
2004
IEEE
Simultaneous Multithreading (SMT) is emerging as an effective microarchitecture model to increase the utilization of resources in modern super-scalar processors. However, co-sched...
160
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ASPDAC
2009
ACM
16 years 1 months ago
2009
ACM
The Leading Zero Anticipator (LZA) is one of the main components used in floating point addition. It tends to be on the critical path, so it has attracted the attention of many r...
187
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IWNAS
2008
IEEE
16 years 27 days ago
2008
IEEE
To protect data and recover data in case of failures, Linux operating system has built-in MD device that implements RAID architectures. Such device can recover data in case of sin...