5762 search results - page 169 / 1153 » R-tree: A Hardware Implementation |
124
click to vote
ICCAD
2004
IEEE
16 years 3 months ago
2004
IEEE
Linear DSP kernels such as transforms and filters are comprised exclusively of additions and multiplications by constants. These multiplications may be realized as networks of ad...
145
click to vote
DATE
2004
IEEE
15 years 10 months ago
2004
IEEE
Mobile video processing as defined in standards like MPEG-4 and H.263 contains a number of timeconsuming computations that cannot be efficiently executed on current hardware archi...
159
click to vote
ICCD
2004
IEEE
16 years 3 months ago
2004
IEEE
In this paper, an efficient Montgomery multiplier is introduced for the modular exponentiation operation, which is fundamental to numerous public-key cryptosystems. Four aspects a...
176
click to vote
IPPS
2007
IEEE
16 years 24 days ago
2007
IEEE
The IBM Cyclops-64 (C64) chip employs a multithreaded architecture that integrates a large number of hardware thread units on a single chip. A cellular supercomputer is being deve...
169
click to vote
FPL
2009
Springer
15 years 11 months ago
2009
Springer
Restricted Boltzmann Machines (RBMs) — the building block for newly popular Deep Belief Networks (DBNs) — are a promising new tool for machine learning practitioners. However,...