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MICRO
2008
IEEE
146views Hardware» more  MICRO 2008»
15 years 6 months ago
A small cache of large ranges: Hardware methods for efficiently searching, storing, and updating big dataflow tags
Dynamically tracking the flow of data within a microprocessor creates many new opportunities to detect and track malicious or erroneous behavior, but these schemes all rely on the...
Mohit Tiwari, Banit Agrawal, Shashidhar Mysore, Jo...
VLSID
2009
IEEE
177views VLSI» more  VLSID 2009»
16 years 7 months ago
Accelerating System-Level Design Tasks Using Commodity Graphics Hardware: A Case Study
Many system-level design tasks (e.g. timing analysis, hardware/software partitioning and design space exploration) involve computational kernels that are intractable (usually NP-ha...
Unmesh D. Bordoloi, Samarjit Chakraborty
HPCA
2007
IEEE
16 years 6 months ago
LogTM-SE: Decoupling Hardware Transactional Memory from Caches
This paper proposes a hardware transactional memory (HTM) system called LogTM Signature Edition (LogTM-SE). LogTM-SE uses signatures to summarize a transaction's readand writ...
Luke Yen, Jayaram Bobba, Michael R. Marty, Kevin E...
ASPLOS
2010
ACM
16 years 1 months ago
A real system evaluation of hardware atomicity for software speculation
In this paper we evaluate the atomic region compiler abstraction by incorporating it into a commercial system. We find that atomic regions are simple and intuitive to integrate i...
Naveen Neelakantam, David R. Ditzel, Craig B. Zill...
SAS
2007
Springer
108views Formal Methods» more  SAS 2007»
16 years 18 days ago
Programming Language Design and Analysis Motivated by Hardware Evolution
Abstract. Silicon chip design has passed a threshold whereby exponentially increasing transistor density (Moore’s Law) no longer translates into increased processing power for si...
Alan Mycroft