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3DPVT
2006
IEEE
199views Visualization» more  3DPVT 2006»
16 years 16 days ago
Fast Level Set Multi-View Stereo on Graphics Hardware
In this paper, we show the importance and feasibility of much faster multi-view stereo reconstruction algorithms relying almost exclusively on graphics hardware. Reconstruction al...
Patrick Labatut, Renaud Keriven, Jean-Philippe Pon...
DATE
2005
IEEE
154views Hardware» more  DATE 2005»
16 years 3 days ago
Secure Embedded Processing through Hardware-Assisted Run-Time Monitoring
— Security is emerging as an important concern in embedded system design. The security of embedded systems is often compromised due to vulnerabilities in “trusted” software t...
Divya Arora, Srivaths Ravi, Anand Raghunathan, Nir...
CHES
2005
Springer
155views Cryptology» more  CHES 2005»
16 years 16 hour ago
Scalable Hardware for Sparse Systems of Linear Equations, with Applications to Integer Factorization
Motivated by the goal of factoring large integers using the Number Field Sieve, several special-purpose hardware designs have been recently proposed for solving large sparse system...
Willi Geiselmann, Adi Shamir, Rainer Steinwandt, E...
MICRO
2006
IEEE
191views Hardware» more  MICRO 2006»
15 years 6 months ago
CAPSULE: Hardware-Assisted Parallel Execution of Component-Based Programs
Since processor performance scalability will now mostly be achieved through thread-level parallelism, there is a strong incentive to parallelize a broad range of applications, inc...
Pierre Palatin, Yves Lhuillier, Olivier Temam
ICCAD
2005
IEEE
127views Hardware» more  ICCAD 2005»
16 years 3 months ago
Hardware synthesis from guarded atomic actions with performance specifications
We present a new hardware synthesis methodology for guarded atomic actions (or rules), which satisfies performance-related scheduling specifications provided by the designer. The ...
Daniel L. Rosenband