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3DIC
2009
IEEE
263views Hardware» more  3DIC 2009»
15 years 9 months ago
3D optical networks-on-chip (NoC) for multiprocessor systems-on-chip (MPSoC)
Abstract— Networks-on-chip (NoC) is emerging as a key onchip communication architecture for multiprocessor systemson-chip (MPSoC). In traditional electronic NoCs, high bandwidth ...
Yaoyao Ye, Lian Duan, Jiang Xu, Jin Ouyang, Mo Kwa...
MOBISYS
2009
ACM
16 years 6 months ago
Point&Connect: intention-based device pairing for mobile phone users
Point&Connect (P&C) offers an intuitive and resilient device pairing solution on standard mobile phones. Its operation follows the simple sequence of point-and-connect: wh...
Chunyi Peng, Guobin Shen, Yongguang Zhang, Songwu ...
IWOMP
2007
Springer
16 years 13 days ago
Supporting OpenMP on Cell
The Cell processor is a heterogeneous multi-core processor with one Power Processing Engine (PPE) core and eight Synergistic Processing Engine (SPE) cores. Each SPE has a directly...
Kevin O'Brien, Kathryn M. O'Brien, Zehra Sura, Ton...
SPAA
2006
ACM
16 years 7 days ago
Astronomical real-time streaming signal processing on a Blue Gene/L supercomputer
LOFAR is the first of a new generation of radio telescopes, that combines the signals from many thousands of simple, fixed antennas, rather than from expensive dishes. Its revol...
John W. Romein, P. Chris Broekema, Ellen van Meije...
PEPM
2009
ACM
17 years 6 months ago
Static Consistency Checking for Verilog Wire Interconnects
The Verilog hardware description language has padding semantics that allow designers to write descriptions where wires of different bit widths can be interconnected. However, many ...
Cherif Salama, Gregory Malecha, Walid Taha, Jim Gr...
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