5762 search results - page 1040 / 1153 » R-tree: A Hardware Implementation |
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DATE
2009
IEEE
16 years 1 months ago
2009
IEEE
Abstract—While prior research has extensively evaluated the performance advantage of moving from a 2D to a 3D design style, the impact of process parameter variations on 3D desig...
163
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DSD
2009
IEEE
16 years 1 months ago
2009
IEEE
Abstract—Verification of application requirements is becoming a bottleneck in system-on-chip design, as the number of applications grows. Traditionally, the verification comple...
154
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DSD
2009
IEEE
16 years 1 months ago
2009
IEEE
—The scalability and performance of the Internet depends critically on the performance of its packet switches. Current packet switches are based on single-hop crossbar fabrics, w...
173
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RECONFIG
2009
IEEE
16 years 1 months ago
2009
IEEE
Abstract—The main challenge when implementing cryptographic algorithms in hardware is to protect them against attacks that target directly the device. Two strategies are customar...
171
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ISCA
2009
IEEE
16 years 1 months ago
2009
IEEE
Recent research advocates memory streaming techniques to alleviate the performance bottleneck caused by the high latencies of off-chip memory accesses. Temporal memory streaming r...