5762 search results - page 1012 / 1153 » R-tree: A Hardware Implementation |
176
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GLVLSI
2007
IEEE
15 years 10 months ago
2007
IEEE
This paper describes a formal verification methodology of highnthesis (HLS) process. The abstraction level of the input to HLS is so high compared to that of the output that the v...
166
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EUROMICRO
2009
IEEE
15 years 10 months ago
2009
IEEE
BPEL is the de facto standard for business process modeling in today's enterprises and is a promising candidate for the integration of business and scientific applications tha...
166
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FMCAD
2009
Springer
15 years 10 months ago
2009
Springer
This paper discusses a methodology used on an industrial hardware development project to validate various cache-coherence protocol components. The idea is to use a high level model...
300
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ACL2
2006
ACM
15 years 10 months ago
2006
ACM
We have extended the ACL2 theorem prover to automatically prove properties of VHDL circuits with IBM's Internal SixthSense verification system. We have used this extension to...
193
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SIGGRAPH
2010
ACM
15 years 10 months ago
2010
ACM
Achieving interactive performance in cloth animation has significant implications in computer games and other interactive graphics applications. Although much progress has been m...