This paper presents a methodology to analyze signal integrity such as power voltage drop and clock skew in early stages of design, more specifically, when RTL-design and early flo...
We present a complete axiomatization of test algebra ( 24, 18, 29]), the two-sorted algebraic variant of Propositional Dynamic Logic (PDL, 21, 7]). The axiomatization consists of ...
The formal description of the semantics of object-oriented data models is still an open problem. Some characteristic features of object-oriented data models, such as methods and i...
Dynamic reconfiguration allows to selectively substitute blocks of logic at run-time in order to improve the area efficiency of a FPGA design. This paper presents the design of a ...
A theory, graphical notation, mathematical calculus and implementation for finding whether two given expressions can, at execution time, denote references attached to the same obje...