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205
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DATE
2009
IEEE
16 years 1 months ago
2009
IEEE
—Verification is a major issue in circuit and system design. Formal methods like bounded model checking (BMC) can guarantee a high quality of the verification. There are severa...
193
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PLDI
2006
ACM
16 years 20 days ago
2006
ACM
Program termination is central to the process of ensuring that systems code can always react. We describe a new program termination prover that performs a path-sensitive and conte...
170
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CASSIS
2004
Springer
16 years 4 days ago
2004
Springer
The ESC/Java tool was a lauded advance in effective static checking of realistic Java programs, but has become out-of-date with respect to Java and the Java Modeling Language (JML...
177
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CONCUR
2008
Springer
15 years 8 months ago
2008
Springer
Abstract. We propose a model of distributed timed systems where each component is a timed automaton with a set of local clocks that evolve at a rate independent of the clocks of th...
214
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ICDE
2011
IEEE
14 years 10 months ago
2011
IEEE
—Complex SQL queries are widely used today, but it is rather difficult to check if a complex query has been written correctly. Formal verification based on comparing a specifi...