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SAMOS
2007
Springer
16 years 18 days ago
Mapping and Performance Evaluation for Heterogeneous MP-SoCs Via Packing
The computational demand of signal processing algorithms is rising continuously. Heterogeneous embedded multiprocessor systems-on-chips are one solution to tackle this demand. But ...
Bastian Ristau, Gerhard Fettweis
SEMWEB
2007
Springer
16 years 18 days ago
RDFSync: Efficient Remote Synchronization of RDF Models
In this paper we describe RDFSync, a methodology for efficient synchronization and merging of RDF models. RDFSync is based on decomposing a model into Minimum Self-Contained graphs...
Giovanni Tummarello, Christian Morbidoni, Reto Bac...
VSMM
2007
Springer
16 years 17 days ago
Prototypes for Automated Architectural 3D-Layout
Prototypes for automated spatial layout in architecture focus on approaches, which define occupiable space as an orthogonal 2D-grid and use algorithms to allocate each rectangle o...
Henriette Bier, Adriaan de Jong, Gijs van der Hoor...
DATE
2006
IEEE
176views Hardware» more  DATE 2006»
16 years 16 days ago
Low power synthesis of dynamic logic circuits using fine-grained clock gating
— Clock power consumes a significant fraction of total power dissipation in high speed precharge/evaluate logic styles. In this paper, we present a novel low-cost design methodol...
Nilanjan Banerjee, Kaushik Roy, Hamid Mahmoodi-Mei...
DATE
2006
IEEE
108views Hardware» more  DATE 2006»
16 years 16 days ago
Automatic march tests generations for static linked faults in SRAMs
Static Linked Faults are considered an interesting class of memory faults. Their capability of influencing the behavior of other faults causes the hiding of the fault effect and m...
Alfredo Benso, Alberto Bosio, Stefano Di Carlo, Gi...