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DAC
2002
ACM
16 years 7 months ago
Design of a high-throughput low-power IS95 Viterbi decoder
The design of high-throughput large-state Viterbi decoders relies on the use of multiple arithmetic units. The global communication channels among these parallel processors often ...
Xun Liu, Marios C. Papaefthymiou
DAC
2004
ACM
16 years 7 months ago
A novel approach for flexible and consistent ADL-driven ASIP design
Architecture description languages (ADL) have been established to aid the design of application-specific instruction-set processors (ASIP). Their main contribution is the automati...
Achim Nohl, Gunnar Braun, Hanno Scharwächter,...
CHI
2006
ACM
16 years 7 months ago
Participatory design with proxies: developing a desktop-PDA system to support people with aphasia
In this paper, we describe the design and preliminary evaluation of a hybrid desktop-handheld system developed to support individuals with aphasia, a disorder which impairs the ab...
Jordan L. Boyd-Graber, Sonya S. Nikolova, Karyn Mo...
DATE
2005
IEEE
152views Hardware» more  DATE 2005»
16 years 13 days ago
Design of Fault-Tolerant and Dynamically-Reconfigurable Microfluidic Biochips
Technology Roadmap for Semiconductors (ITRS) clearly identifies the integration of electrochemical and electrobiological techniques as one of the system-level design challenges tha...
Fei Su, Krishnendu Chakrabarty
HPCA
2009
IEEE
16 years 7 months ago
Blueshift: Designing processors for timing speculation from the ground up
Several recent processor designs have proposed to enhance performance by increasing the clock frequency to the point where timing faults occur, and by adding error-correcting supp...
Brian Greskamp, Lu Wan, Ulya R. Karpuzcu, Jeffrey ...