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ASPDAC
2005
ACM
102views Hardware» more  ASPDAC 2005»
15 years 8 months ago
A framework for automated and optimized ASIP implementation supporting multiple hardware description languages
— Architecture Description Languages (ADLs) are widely used to perform design space exploration for Application Specific Instruction Set Processors (ASIPs). While the design spa...
Oliver Schliebusch, Anupam Chattopadhyay, David Ka...
CEC
2007
IEEE
15 years 8 months ago
Fitness inheritance in evolutionary and multi-objective high-level synthesis
Abstract—The high-level synthesis process allows the automatic design and implementation of digital circuits starting from a behavioral description. Evolutionary algorithms are v...
Christian Pilato, Gianluca Palermo, Antonino Tumeo...
ISLPED
2007
ACM
96views Hardware» more  ISLPED 2007»
15 years 8 months ago
Low-power process-variation tolerant arithmetic units using input-based elastic clocking
In this paper we propose a design methodology for low-power, high-performance, process-variation tolerant architecture for arithmetic units. The novelty of our approach lies in th...
Debabrata Mohapatra, Georgios Karakonstantis, Kaus...
DMS
2008
132views Multimedia» more  DMS 2008»
15 years 8 months ago
STRAT: a Sketched-truss Recognition and Analysis Tool
The statically-determinate, pin-connected truss is a basic structural element used by engineers to create larger and more complex systems. Truss analysis and design are topics tha...
Joshua M. Peschel, Tracy Anne Hammond
HCI
2007
15 years 8 months ago
Immersive Digital Games: The Interfaces for Next-Generation E-Learning?
The intrinsic motivation to play, and therefore to learn, that might be provided by digital educational games teases researchers and developers. However, existing educational games...
Michael D. Kickmeier-Rust, Neil Peirce, Owen Conla...