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VLSID
2002
IEEE
107views VLSI» more  VLSID 2002»
16 years 7 months ago
Automatic Model Refinement for Fast Architecture Exploration
We present a methodology and algorithms for automatic refinement from a given design specification to an architecture model based on decisions in architecture exploration. An arch...
Junyu Peng, Samar Abdi, Daniel Gajski
ICCAD
2008
IEEE
103views Hardware» more  ICCAD 2008»
16 years 3 months ago
Hardware protection and authentication through netlist level obfuscation
—Hardware Intellectual Property (IP) cores have emerged as an integral part of modern System–on–Chip (SoC) designs. However, IP vendors are facing major challenges to protect...
Rajat Subhra Chakraborty, Swarup Bhunia
SAMOS
2005
Springer
16 years 5 days ago
Automatic FIR Filter Generation for FPGAs
This paper presents a new tool for the automatic generation of highly parallelized Finite Impulse Response (FIR) filters. In this approach we follow our PARO design methodology. P...
Holger Ruckdeschel, Hritam Dutta, Frank Hannig, J&...
DAC
2005
ACM
15 years 8 months ago
Constraint-aware robustness insertion for optimal noise-tolerance enhancement in VLSI circuits
Reliability of nanometer circuits is becoming a major concern in today’s VLSI chip design due to interferences from multiple noise sources as well as radiation-induced soft erro...
Chong Zhao, Yi Zhao, Sujit Dey
PLDI
2012
ACM
13 years 9 months ago
Speculative linearizability
Linearizability is a key design methodology for reasoning about tations of concurrent abstract data types in both shared memory and message passing systems. It provides the illusi...
Rachid Guerraoui, Viktor Kuncak, Giuliano Losa