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DAC
1999
ACM
15 years 11 months ago
Verification and Management of a Multimillion-Gate Embedded Core Design
Verification is one of the most critical and time-consuming tasks in today's design processes. This paper demonstrates the verification process of a 8.8 million gate design u...
Johann Notbauer, Thomas W. Albrecht, Georg Niedris...
WWW
2006
ACM
16 years 7 months ago
Semantic web integration of cultural heritage sources
In this paper, we describe research into the use of ontologies to integrate access to cultural heritage and photographic archives. The use of the CIDOC CRM and CRM Core ontologies...
Patrick A. S. Sinclair, Paul H. Lewis, Kirk Martin...
DATE
2005
IEEE
97views Hardware» more  DATE 2005»
16 years 8 days ago
Synchronization Processor Synthesis for Latency Insensitive Systems
In this paper we present our contribution in terms of synchronization processor for a SoC design methodology based on the theory of the latency insensitive systems (LIS) of Carlon...
Pierre Bomel, Eric Martin, Emmanuel Boutillon
EIT
2008
IEEE
16 years 1 months ago
Use of local biasing in designing analog integrated circuits
—A new biasing technique called “local biasing” of transistors is used to design analog integrated circuit amplifiers, or any other analog ICs. The technique is based on desi...
Reza Hashemian
ISQED
2008
IEEE
98views Hardware» more  ISQED 2008»
16 years 1 months ago
Design Margin Exploration of Spin-Torque Transfer RAM (SPRAM)
We proposed a combined magnetic and circuit level technique to explore the design methodology of SpinTorque Transfer RAM (SPRAM). A dynamic magnetic model of magnetic tunneling ju...
Yiran Chen, Xiaobin Wang, Hai Li, Harry Liu, Dimit...