1144 search results - page 55 / 229 » Protocol Implementation in a Vertically Structured Operating... |
133
click to vote
GLOBECOM
2006
IEEE
16 years 20 hour ago
2006
IEEE
— We present a field programmable gate array (FPGA) implementation of a turbo-like decoder for a serially concatenated pulse-position modulation (SCPPM) code. NASA developed thi...
154
click to vote
IJCAI
2003
15 years 7 months ago
2003
Disjunctive Logic Programming (DLP) is a very expressive formalism: it allows to express every property of finite structures that is decidable in the complexity class ¡£¢¤ (...
173
click to vote
DATE
2003
IEEE
15 years 11 months ago
2003
IEEE
We present an innovative protocol processor component that combines wire-speed processing for low-level, and best effort processing for higher-level protocols. The component is a ...
141
click to vote
JPDC
2006
15 years 6 months ago
2006
The vulnerability of computer nodes due to component failures is a critical issue for cluster-based file systems. This paper studies the development and deployment of mirroring in...
152
click to vote
ICS
2005
Tsinghua U.
15 years 11 months ago
2005
Tsinghua U.
Parallel I/O needs to keep pace with the demand of high performance computing applications on systems with ever-increasing speed. Exploiting high-end interconnect technologies to ...