: In this article we advocate an integrated approach for the automation of module or software integration testing and static analysis. It is illustrated how funmethods of static an...
This paper presents a technique that allows test engineers to visually analyze and explore within memory chip test data. We represent the test results from a generation of chips al...
— We present a probabilistic fault model that allows any number of gates in an integrated circuit to fail probabilistically. Tests for this fault model, determined using the theo...
Zhanglei Wang, Krishnendu Chakrabarty, Michael G&o...
This paper extends basic software-testing theory to software components and adds explicit state to the theory. The resulting theory e enough to abstractly model the construction o...
This paper addresses error-resilience as the capability to tolerate bit-flips in a compressed test data stream (which is transferred from an Automatic Test Equipment (ATE) to the...