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VTS
2003
IEEE
81views Hardware» more  VTS 2003»
15 years 12 months ago
Test Resource Partitioning and Optimization for SOC Designs
1 We propose a test resource partitioning and optimization technique for core-based designs. Our technique includes test set selection and test resource floor-planning with the ai...
Erik Larsson, Hideo Fujiwara
WCRE
2000
IEEE
15 years 11 months ago
Designing an XML-based Exchange Format for Harmonia
In this paper we present our design for a program data exchange format for Harmonia, a framework for constructing language-sensitive interactive CASE tools. We discuss the various...
Marat Boshernitsan, Susan L. Graham
DAC
2000
ACM
15 years 11 months ago
System design of active basestations based on dynamically reconfigurable hardware
– This paper describes the system design and implementation of Active Basestations, a novel application of the run-time reconfigurable hardware technology whose applications have...
Athanassios Boulis, Mani B. Srivastava
EURODAC
1995
IEEE
159views VHDL» more  EURODAC 1995»
15 years 10 months ago
The VHDL based design of the MIDA MPEG1 audio decoder
This paper describes the features and design methodology of MIDA, a MPEG1 integrated audio decoder. MIDA has been almost completely designed using automatic synthesis of VHDL desc...
Andrea Finotello, Maurizio Paolini
JUCS
2007
110views more  JUCS 2007»
15 years 6 months ago
Designing Collaborative Learning Environments Using Digital Games
: Collaborative learning environments require carefully crafted designs –both technical and social. This paper presents a model describing how to design socio-technical environme...
César A. Collazos, Luis A. Guerrero, Jos&ea...