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ASPLOS
2006
ACM
16 years 18 days ago
Software-based instruction caching for embedded processors
While hardware instruction caches are present in virtually all general-purpose and high-performance microprocessors today, many embedded processors use SRAM or scratchpad memories...
Jason E. Miller, Anant Agarwal
KBSE
2005
IEEE
16 years 6 days ago
An analysis of rule coverage as a criterion in generating minimal test suites for grammar-based software
The term grammar-based software describes software whose input can be specified by a context-free grammar. This grammar may occur explicitly in the software, in the form of an in...
Mark Hennessy, James F. Power
ASPLOS
2004
ACM
16 years 1 days ago
An ultra low-power processor for sensor networks
We present a novel processor architecture designed specifically for use in low-power wireless sensor-network nodes. Our sensor network asynchronous processor (SNAP/LE) is based on...
Virantha N. Ekanayake, Clinton Kelly IV, Rajit Man...
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PADL
2004
Springer
15 years 12 months ago
Symbolic Execution of Behavioral Requirements
Message Sequence Charts (MSC) have traditionally been used as a weak form of behavioral requirements in software design; they denote scenarios which may happen. Live Sequence Chart...
Tao Wang, Abhik Roychoudhury, Roland H. C. Yap, S....
IWOMP
2010
Springer
15 years 11 months ago
A ROSE-Based OpenMP 3.0 Research Compiler Supporting Multiple Runtime Libraries
OpenMP is a popular and evolving programming model for shared-memory platforms. It relies on compilers to target modern hardware architectures for optimal performance. A variety of...
Chunhua Liao, Daniel J. Quinlan, Thomas Panas, Bro...