—Formal verification of low-level programs often requires explicit reasoning and specification of runtime stacks. Treating stacks naively as parts of ordinary heaps can lead to...
—We envision that future FPGA will use a hardwired network on chip (HWNoC) [14] as a unified interconnect for functional communications (data and control) as well as configurat...
In this paper an optimized k-means implementation on the graphics processing unit (GPU) is presented. NVIDIA’s Compute Unified Device Architecture (CUDA), available from the G8...
In this paper, we propose a convex optimization based approach for piecewise planar reconstruction. We show that the task of reconstructing a piecewise planar environment can be se...
FAdo is an ongoing project which aims to provide a set of tools for symbolic manipulation of formal languages. To allow highlevel programming with complex data structures, easy pro...