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FCCM
2006
IEEE
133views VLSI» more  FCCM 2006»
16 years 1 months ago
A Scalable FPGA-based Multiprocessor
It has been shown that a small number of FPGAs can significantly accelerate certain computing tasks by up to two or three orders of magnitude. However, particularly intensive lar...
Arun Patel, Christopher A. Madill, Manuel Salda&nt...
ASPLOS
2008
ACM
15 years 9 months ago
Feedback-driven threading: power-efficient and high-performance execution of multi-threaded workloads on CMPs
Extracting high-performance from the emerging Chip Multiprocessors (CMPs) requires that the application be divided into multiple threads. Each thread executes on a separate core t...
M. Aater Suleman, Moinuddin K. Qureshi, Yale N. Pa...
FCCM
2008
IEEE
165views VLSI» more  FCCM 2008»
16 years 2 months ago
Performance Analysis with High-Level Languages for High-Performance Reconfigurable Computing
High-Level Languages (HLLs) for FPGAs (FieldProgrammable Gate Arrays) facilitate the use of reconfigurable computing resources for application developers by using familiar, higher...
John Curreri, Seth Koehler, Brian Holland, Alan D....
ACSAC
2007
IEEE
16 years 1 months ago
Channels: Runtime System Infrastructure for Security-Typed Languages
Security-typed languages (STLs) are powerful tools for provably implementing policy in applications. The programmer maps policy onto programs by annotating types with information ...
Boniface Hicks, Tim Misiak, Patrick McDaniel
191
Voted
IPPS
2006
IEEE
16 years 1 months ago
Anticipated distributed task scheduling for grid environments
Heterogeneous distributed environments or grid environments provide large computing resources for the execution of large scientific applications. The effective use of those plat...
Thomas Rauber, Gudula Rünger