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IV
2008
IEEE
126views Visualization» more  IV 2008»
16 years 1 months ago
Stencil: A Conceptual Model for Representation and Interaction
Existing Information Visualization models provide insufficient support to visualization programmers in creating applications. They either broad and taxonomy based, or narrowly fo...
Joseph A. Cottam, Andrew Lumsdaine
RTAS
2008
IEEE
16 years 1 months ago
WCET Analysis for Multi-Core Processors with Shared L2 Instruction Caches
Multi-core chips have been increasingly adopted by microprocessor industry. For real-time systems to safely harness the potential of multi-core computing, designers must be able t...
Jun Yan, Wei Zhang
SBACPAD
2008
IEEE
249views Hardware» more  SBACPAD 2008»
16 years 1 months ago
Processing Neocognitron of Face Recognition on High Performance Environment Based on GPU with CUDA Architecture
This work presents an implementation of Neocognitron Neural Network, using a high performance computing architecture based on GPU (Graphics Processing Unit). Neocognitron is an ar...
Gustavo Poli, José Hiroki Saito, Joã...
WCNC
2008
IEEE
16 years 1 months ago
Senslets- Applets for the Sensor Internet
The Sensor Internet provides access to sensor services by connecting sensor nodes to the Internet infrastructure. To achieve this, current solutions rely on fixed access points or ...
Frank Siegemund, Muhammad Haroon, Junaid Ansari, P...
DATE
2007
IEEE
142views Hardware» more  DATE 2007»
16 years 1 months ago
Optimizing instruction-set extensible processors under data bandwidth constraints
We present a methodology for generating optimized architectures for data bandwidth constrained extensible processors. We describe a scalable Integer Linear Programming (ILP) formu...
Kubilay Atasu, Robert G. Dimond, Oskar Mencer, Way...
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