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DATE
2009
IEEE
133views Hardware» more  DATE 2009»
16 years 1 months ago
Energy efficient multiprocessor task scheduling under input-dependent variation
— In this paper, we propose a novel, energy aware scheduling algorithm for applications running on DVS-enabled multiprocessor systems, which exploits variation in execution times...
Jason Cong, Karthik Gururaj
ICPP
2009
IEEE
16 years 1 months ago
Fine-grain Parallelism Using Multi-core, Cell/BE, and GPU Systems: Accelerating the Phylogenetic Likelihood Function
We are currently faced with the situation where applications have increasing computational demands and there is a wide selection of parallel processor systems. In this paper we fo...
Frederico Pratas, Pedro Trancoso, Alexandros Stama...
ICPP
2009
IEEE
16 years 1 months ago
Integrated Performance Views in Charm++: Projections Meets TAU
Abstract—The Charm++ parallel programming system provides a modular performance interface that can be used to extend its performance measurement and analysis capabilities. The in...
Scott Biersdorff, Chee Wai Lee, Allen D. Malony, L...
ICPP
2009
IEEE
16 years 1 months ago
CIFTS: A Coordinated Infrastructure for Fault-Tolerant Systems
—Considerable work has been done on providing fault tolerance capabilities for different software components on largescale high-end computing systems. Thus far, however, these fa...
Rinku Gupta, Pete Beckman, Byung-Hoon Park, Ewing ...
IISWC
2009
IEEE
16 years 1 months ago
Understanding PARSEC performance on contemporary CMPs
PARSEC is a reference application suite used in industry and academia to assess new Chip Multiprocessor (CMP) designs. No investigation to date has profiled PARSEC on real hardwa...
Major Bhadauria, Vincent M. Weaver, Sally A. McKee
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