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EUROPAR
2009
Springer
16 years 1 months ago
Process Mapping for MPI Collective Communications
It is an important problem to map virtual parallel processes to physical processors (or cores) in an optimized way to get scalable performance due to non-uniform communication cost...
Jin Zhang, Jidong Zhai, Wenguang Chen, Weimin Zhen...
CASES
2009
ACM
16 years 1 months ago
CGRA express: accelerating execution using dynamic operation fusion
Coarse-grained reconfigurable architectures (CGRAs) present an appealing hardware platform by providing programmability with the potential for high computation throughput, scalab...
Yongjun Park, Hyunchul Park, Scott A. Mahlke
IPPS
2008
IEEE
16 years 1 months ago
Parallel mining of closed quasi-cliques
Graph structure can model the relationships among a set of objects. Mining quasi-clique patterns from large dense graph data makes sense with respect to both statistic and applica...
Yuzhou Zhang, Jianyong Wang, Zhiping Zeng, Lizhu Z...
202
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ISCA
2008
IEEE
170views Hardware» more  ISCA 2008»
16 years 1 months ago
Polymorphic On-Chip Networks
As the number of cores per die increases, be they processors, memory blocks, or custom accelerators, the on-chip interconnect the cores use to communicate gains importance. We beg...
Martha Mercaldi Kim, John D. Davis, Mark Oskin, To...
CODES
2007
IEEE
16 years 1 months ago
HySim: a fast simulation framework for embedded software development
Instruction Set Simulation (ISS) is widely used in system evaluation and software development for embedded processors. Despite the significant advancements in the ISS technology,...
Stefan Kraemer, Lei Gao, Jan Weinstock, Rainer Leu...