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VLSID
2008
IEEE
128views VLSI» more  VLSID 2008»
16 years 7 months ago
A Novel Approach to Compute Spatial Reuse in the Design of Custom Instructions
In the automatic design of custom instruction set processors, there can be a very large set of potential custom instructions, from which a few instructions are required to be chos...
Nagaraju Pothineni, Anshul Kumar, Kolin Paul
HPCA
2002
IEEE
16 years 7 months ago
Quantifying Load Stream Behavior
The increasing performance gap between processors and memory will force future architectures to devote significant resources towards removing and hiding memory latency. The two ma...
Suleyman Sair, Timothy Sherwood, Brad Calder
SIGMOD
2006
ACM
232views Database» more  SIGMOD 2006»
16 years 7 months ago
High-performance complex event processing over streams
In this paper, we present the design, implementation, and evaluation of a system that executes complex event queries over real-time streams of RFID readings encoded as events. The...
Eugene Wu 0002, Yanlei Diao, Shariq Rizvi
SIGMOD
2004
ACM
157views Database» more  SIGMOD 2004»
16 years 7 months ago
Holistic UDAFs at streaming speeds
Many algorithms have been proposed to approximate holistic aggregates, such as quantiles and heavy hitters, over data streams. However, little work has been done to explore what t...
Graham Cormode, Theodore Johnson, Flip Korn, S. Mu...
ICCAD
2008
IEEE
162views Hardware» more  ICCAD 2008»
16 years 3 months ago
MAPS: multi-algorithm parallel circuit simulation
— The emergence of multi-core and many-core processors has introduced new opportunities and challenges to EDA research and development. While the availability of increasing paral...
Xiaoji Ye, Wei Dong, Peng Li, Sani R. Nassif