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HPCA
1999
IEEE
15 years 11 months ago
Impulse: Building a Smarter Memory Controller
Impulse is a new memory system architecture that adds two important features to a traditional memory controller. First, Impulse supports application-specific optimizations through...
John B. Carter, Wilson C. Hsieh, Leigh Stoller, Ma...
IEEEPACT
1999
IEEE
15 years 11 months ago
Cameron: High level Language Compilation for Reconfigurable Systems
This paper presents the Cameron Project 1 , which aims to provide a high level, algorithmic language and optimizing compiler for the development of image processing applications o...
Jeffrey Hammes, Robert Rinker, A. P. Wim Böhm...
IPPS
1998
IEEE
15 years 11 months ago
Efficient Runtime Thread Management for the Nano-Threads Programming Model
Abstract. The nano-threads programming model was proposed to effectively integrate multiprogramming on shared-memory multiprocessors, with the exploitation of fine-grain parallelis...
Dimitrios S. Nikolopoulos, Eleftherios D. Polychro...
MICRO
1996
IEEE
173views Hardware» more  MICRO 1996»
15 years 11 months ago
Java Bytecode to Native Code Translation: The Caffeine Prototype and Preliminary Results
The Java bytecode language is emerging as a software distribution standard. With major vendors committed to porting the Java run-time environment to their platforms, programs in J...
Cheng-Hsueh A. Hsieh, John C. Gyllenhaal, Wen-mei ...
ASPLOS
1996
ACM
15 years 11 months ago
The Structure and Performance of Interpreters
Interpreted languages have become increasingly popular due to demands for rapid program development, ease of use, portability, and safety. Beyond the general impression that they ...
Theodore H. Romer, Dennis Lee, Geoffrey M. Voelker...