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191
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VLSID
2002
IEEE
15 years 11 months ago
2002
IEEE
This paper introduces a dynamic layout optimization strategy to minimize the number of cycles spent in memory accesses in a cache-based memory environment. In this approach, a giv...
202
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PDP
2010
IEEE
15 years 11 months ago
2010
IEEE
The increasing numbers of cores, shared caches and memory nodes within machines introduces a complex hardware topology. High-performance computing applications now have to carefull...
162
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IPPS
1999
IEEE
15 years 11 months ago
1999
IEEE
This paper explains how efficient support for semiregular distributions can be incorporated in a uniform compilation framework for hybrid applications. The key focus of this work ...
163
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ISSS
1998
IEEE
15 years 11 months ago
1998
IEEE
Designing a cost effective superscalar architecture for x86 compatible microprocessors is a challenging task in terms of both technical difficulty and commercial value. One of the...
186
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DATE
2004
IEEE
15 years 10 months ago
2004
IEEE
This paper presents a new and simple prefetching mechanism to improve the memory performance of multimedia applications. This method adapts the memory access mechanism to the acce...