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ASAP
2006
IEEE
169views Hardware» more  ASAP 2006»
16 years 24 days ago
A Design Methodology for Hardware Acceleration of Adaptive Filter Algorithms in Image Processing
Massively parallel processor array architectures can be used as hardware accelerators for a plenty of dataflow dominant applications. Bilateral filtering is an example of a stat...
Hritam Dutta, Frank Hannig, Jürgen Teich, Ben...
ARC
2006
Springer
88views Hardware» more  ARC 2006»
15 years 10 months ago
Integrating Custom Instruction Specifications into C Development Processes
Abstract. We describe a new approach for creating hardware description language (HDL) specifications for custom instructions, to form part of the instruction-set architecture (ISA)...
Jack Whitham, Neil C. Audsley
IJHPCA
2006
80views more  IJHPCA 2006»
15 years 6 months ago
Interference-Aware Scheduling
Overlapping communication with computation is a well-known technique to increase application performance. While it is commonly assumed that communication and computation can be ov...
Barbara Kreaseck, Larry Carter, Henri Casanova, Je...
IEEECIT
2010
IEEE
15 years 5 months ago
Caching Strategy on Mobile Rich Media Engine
With the increasing development of mobile rich media applications, it has become an important research topic on how to reduce application response time so as to run more smoothly ...
Xin Min, Jixian Zhang, Lei Luo
HUC
2005
Springer
16 years 7 days ago
Learning and Recognizing the Places We Go
Location-enhanced mobile devices are becoming common, but applications built for these devices find themselves suffering a mismatch between the latitude and longitude that locati...
Jeffrey Hightower, Sunny Consolvo, Anthony LaMarca...