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ICCD
2002
IEEE
79views Hardware» more  ICCD 2002»
16 years 3 months ago
TAXI: Trace Analysis for X86 Interpretation
Although x86 processors have been around for a long time and are the most ubiquitous processors in the world, the amount of academic research regarding details of their performanc...
Stevan A. Vlaovic, Edward S. Davidson
ICCD
2000
IEEE
106views Hardware» more  ICCD 2000»
15 years 11 months ago
Fast Subword Permutation Instructions Using Omega and Flip Network Stages
This paper proposes a new way of efficiently doing arbitrary ¢ -bit permutations in programmable processors modeled on the theory of omega and flip networks. The new omflip ins...
Xiao Yang, Ruby B. Lee
CONPAR
1992
15 years 10 months ago
Asynchronous Polycyclic Architecture
The Asynchronous Polycyclic Architecture (APA) is a new processor design for numerically intensive applications. APA resembles the VLIW architecture, in that it provides independen...
Geraldo Lino de Campos
DATE
2006
IEEE
120views Hardware» more  DATE 2006»
15 years 10 months ago
Battery-aware code partitioning for a text to speech system
The advent of multi-core embedded processors has brought along new challenges for embedded system design. This paper presents an efficient, battery aware, code partitioning techni...
Anirban Lahiri, Anupam Basu, Monojit Choudhury, Sr...
FPL
2000
Springer
187views Hardware» more  FPL 2000»
15 years 10 months ago
Mapping of DSP Algorithms on Field Programmable Function Arrays
This position paper1 discusses reconfigurability issues in low-power handheld multimedia systems. A reconfigurable systems-architecture is introduced, with a focus on a Field Progr...
Paul M. Heysters, Jaap Smit, Gerard J. M. Smit, Pa...