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IPPS
2002
IEEE
15 years 11 months ago
System-Level Analysis for MPEG-4 Decoding on a Multi-Processor Architecture
The convergence of TV and new features such as Internet and games, requires a generic media-processing platform, that enables simultaneous execution of very diverse tasks, ranging...
Egbert G. T. Jaspers, Erik B. van der Tol, Peter H...
LCN
2002
IEEE
15 years 11 months ago
Design and Analysis of a Dynamically Reconfigurable Network Processor
The combination of high-performance processing power and flexibility found in network processors (NPs) has made them a good solution for today’s packet processing needs. Similar...
Ian A. Troxel, Alan D. George, Sarp Oral
CIKM
2009
Springer
15 years 11 months ago
Density-based clustering using graphics processors
During the last few years, GPUs have evolved from simple devices for the display signal preparation into powerful coprocessors that do not only support typical computer graphics t...
Christian Böhm, Robert Noll, Claudia Plant, B...
ICMCS
2000
IEEE
90views Multimedia» more  ICMCS 2000»
15 years 11 months ago
Software Optimization of H.263 Video Encoder on Pentium Processor with MMX Technology
A key enabling technology for the prolikration of multima dia PC’s is the availability of fast video codeca, which are the basic building blocks of many new multimedia applicati...
Pohsiang Hsu, K. J. Ray Liu
ISSS
1999
IEEE
168views Hardware» more  ISSS 1999»
15 years 11 months ago
Automatic Architectural Synthesis of VLIW and EPIC Processors
This paper describes a mechanism for automatic design and synthesis of very long instruction word (VLIW), and its generalization, explicitly parallel instruction computing rocesso...
Shail Aditya, B. Ramakrishna Rau, Vinod Kathail