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DSD
2008
IEEE
139views Hardware» more  DSD 2008»
15 years 8 months ago
Revisiting the Cache Effect on Multicore Multithreaded Network Processors
Caching mechanism has achieved great success in general purpose processor; however, its deployment in Network Processor (NP) raises questions over its effectiveness under the new ...
Zhen Liu, Jia Yu, Xiaojun Wang, Bin Liu, Laxmi N. ...
ASAP
2010
IEEE
185views Hardware» more  ASAP 2010»
15 years 6 months ago
ImpEDE: A multidimensional design-space exploration framework for biomedical-implant processors
Abstract—The demand for biomedical implants keeps increasing. However, most of the current implant design methodologies involve custom-ASIC design. The SiMS project aims to chang...
Dhara Dave, Christos Strydis, Georgi Gaydadjiev
CCGRID
2010
IEEE
15 years 5 months ago
An Adaptive Data Prefetcher for High-Performance Processors
—While computing speed continues increasing rapidly, data-access technology is lagging behind. Data-access delay, not the processor speed, becomes the leading performance bottlen...
Yong Chen, Huaiyu Zhu, Xian-He Sun
JSAC
2010
104views more  JSAC 2010»
15 years 5 months ago
A priority-based processor sharing model for TDM passive optical networks
—The use of passive optical networks (PONs) enables access rates of multi-Gbit/sec bandwidth and provision of quality of service for high definition multimedia services. In this...
Yan Wang, Moshe Zukerman, Ron Addie, Sammy Chan, R...
DSD
2010
IEEE
137views Hardware» more  DSD 2010»
15 years 4 months ago
A C-to-RTL Flow as an Energy Efficient Alternative to Embedded Processors in Digital Systems
We present a high-level synthesis flow for mapping an algorithm description (in C) to a provably equivalent registertransfer level (RTL) description of hardware. This flow uses an ...
Sameer D. Sahasrabuddhe, Sreenivas Subramanian, Ku...