The performance of software executed on a microprocessor is adversely affected by the basic fetchexecute cycle. A further performance penalty results from the load-execute-store p...
Darrin M. Hanna, Michael DuChene, Girma S. Tewolde...
In this case study, various ways to partition a code between the microprocessor and FPGA are examined. Discrete image convolution operation with separable kernel is used as the ca...
The need for supporting CSCW applications with heterogeneous and varying user requirements call for adaptive and reconfigurable schedulers accommodating a mixture of real-time, pro...
: Corporate household data not only refers to the strict hierarchical structure about and within the corporation, but also the variety of inter-organizational relationships. It is ...
Stuart E. Madnick, Richard Y. Wang, Frank Dravis, ...
This paper discusses the issues involved in implementing a dynamic programming algorithm for biological sequence comparison on a generalpurpose parallel computing platform based o...
W. S. Martins, Juan del Cuvillo, F. J. Useche, Kev...