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FPL
2007
Springer
97views Hardware» more  FPL 2007»
15 years 10 months ago
An FPGA Approach to Quantifying Coherence Traffic Efficiency on Multiprocessor Systems
Recently, there is a surge of interests in using FPGAs for computer architecture research including applications from emulating and analyzing a new platform to accelerating microa...
Taeweon Suh, Shih-Lien Lu, Hsien-Hsin S. Lee
HPCC
2007
Springer
15 years 10 months ago
An Exploration of Performance Attributes for Symbolic Modeling of Emerging Processing Devices
Vector, emerging (homogenous and heterogeneous) multi-core and a number of accelerator processing devices potentially offer an order of magnitude speedup for scientific application...
Sadaf R. Alam, Nikhil Bhatia, Jeffrey S. Vetter
ICCCN
2007
IEEE
15 years 10 months ago
Fair Efficiency, or Low Average Delay without Starvation
Abstract-- Elastic applications are primarily interested in minimal delay achievable for their messages under current network load. In this paper, we investigate how to transmit su...
Sergey Gorinsky, Christoph Jechlitschek
ASPDAC
2004
ACM
96views Hardware» more  ASPDAC 2004»
15 years 10 months ago
Mixed-clock issue queue design for energy aware, high-performance cores
- Globally-Asynchronous, Locally-Synchronous (GALS) design style has started to gain interest recently as a possible solution to the increased design complexity, power and thermal ...
Venkata Syam P. Rapaka, Emil Talpes, Diana Marcule...
ARC
2006
Springer
157views Hardware» more  ARC 2006»
15 years 10 months ago
PISC: Polymorphic Instruction Set Computers
We introduce a new paradigm in the computer architecture referred to as Polymorphic Instruction Set Computers (PISC). This new paradigm, in difference to RISC/CISC, introduces hard...
Stamatis Vassiliadis, Georgi Kuzmanov, Stephan Won...
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