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ASPLOS
1996
ACM
15 years 10 months ago
Reducing Network Latency Using Subpages in a Global Memory Environment
New high-speed networks greatly encourage the use of network memory as a cache for virtual memory and file pages, thereby reducing the need for disk access. Becausepages are the f...
Hervé A. Jamrozik, Michael J. Feeley, Geoff...
CHI
1996
ACM
15 years 10 months ago
The WebBook and the Web Forager: An Information Workspace for the World-Wide Web
The World-Wide Web has achieved global connectivity stimulating the transition of computers from knowledge processors to knowledge sources. But the Web and its client software are...
Stuart K. Card, George G. Robertson, William York
ICCAD
1994
IEEE
105views Hardware» more  ICCAD 1994»
15 years 10 months ago
Register assignment through resource classification for ASIP microcode generation
Application Specific Instruction-Set Processors (ASIPs) offer designers the ability for high-speed data and control processing with the added flexibility needed for late design sp...
Clifford Liem, Trevor C. May, Pierre G. Paulin
IPPS
1994
IEEE
15 years 10 months ago
Parallel Evaluation of a Parallel Architecture by Means of Calibrated Emulation
A parallel transputer-based emulator has been developed to evaluate the DDM--ahighlyparallel virtual shared memory architecture. The emulator provides performance results of a har...
Henk L. Muller, Paul W. A. Stallard, David H. D. W...
ISCA
1994
IEEE
123views Hardware» more  ISCA 1994»
15 years 10 months ago
Software-Extended Coherent Shared Memory: Performance and Cost
This paper evaluates the tradeoffs involved in the design of the software-extended memory system of Alewife, a multiprocessor architecturethat implements coherentsharedmemorythrou...
David Chaiken, Anant Agarwal
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