Sciweavers

6781 search results - page 1113 / 1357
» Processors for Mobile Applications
Sort
View
LCTRTS
1999
Springer
15 years 11 months ago
Effective Exploitation of a Zero Overhead Loop Buffer
A Zero Overhead Loop Buffer (ZOLB) is an architectural feature that is commonly found in DSP processors. This buffer can be viewed as a compiler managed cache that contains a sequ...
Gang-Ryung Uh, Yuhong Wang, David B. Whalley, Sanj...
ISCA
1998
IEEE
137views Hardware» more  ISCA 1998»
15 years 10 months ago
Accurate Indirect Branch Prediction
Indirect branch prediction is likely to become increasingly important in the future because indirect branches occur more frequently in object-oriented programs. With misprediction ...
Karel Driesen, Urs Hölzle
ISCA
1998
IEEE
119views Hardware» more  ISCA 1998»
15 years 10 months ago
Using Prediction to Accelerate Coherence Protocols
Most large shared-memory multiprocessors use directory protocols to keep per-processor caches coherent. Some memory references in such systems, however, suffer long latencies for ...
Shubhendu S. Mukherjee, Mark D. Hill
VISUALIZATION
1998
IEEE
15 years 10 months ago
Efficient warping for architectural walkthroughs using layered depth images
This paper presents efficient image-based rendering techniques used in the context of an architectural walkthrough system. Portals (doors and windows) are rendered by warping laye...
Voicu Popescu, Anselmo Lastra, Daniel G. Aliaga, M...
ASPLOS
1998
ACM
15 years 10 months ago
Segregating Heap Objects by Reference Behavior and Lifetime
Dynamic storage allocation has become increasingly important in many applications, in part due to the use of the object-oriented paradigm. At the same time, processor speeds are i...
Matthew L. Seidl, Benjamin G. Zorn
« Prev « First page 1113 / 1357 Last » Next »