2700 search results - page 265 / 540 » Processor Architectures for Ontogenesis |
162
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ISCA
2000
IEEE
15 years 11 months ago
2000
IEEE
Speculative parallelization aggressively executes in parallel codes that cannot be fully parallelized by the compiler. Past proposals of hardware schemes have mostly focused on si...
186
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ARITH
1999
IEEE
15 years 10 months ago
1999
IEEE
The design and implementation of a double precision floating-point IEEE-754 standard adder is described which uses "flagged prefix addition" to merge rounding with the s...
143
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ISCA
1999
IEEE
15 years 10 months ago
1999
IEEE
In response to the growing gap between memory access time and processor speed, DRAM manufacturers have created several new DRAM architectures. This paper presents a simulation-bas...
153
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MICRO
1999
IEEE
15 years 10 months ago
1999
IEEE
The speculative multithreading paradigm (speculative threadlevel parallelism) is based on the concurrent execution of control-speculative threads. The efficiency of microarchitect...
164
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IEEEPACT
1998
IEEE
15 years 10 months ago
1998
IEEE
The fast evolution of processor performance necessitates a permanent evolution of all the multiprocessor components, even for small to medium-scale symmetric multiprocessors (SMP)...