Sciweavers

2700 search results - page 263 / 540
» Processor Architectures for Ontogenesis
Sort
View
DATE
2007
IEEE
114views Hardware» more  DATE 2007»
16 years 25 days ago
Mapping the physical layer of radio standards to multiprocessor architectures
We are concerned with the software implementation of baseband processing for the physical layer of radio standards (“Software Defined Radio - SDR”). Given the constraints for ...
Cyprian Grassmann, Mathias Richter, Mirko Sauerman...
SRDS
2007
IEEE
16 years 23 days ago
The Fail-Heterogeneous Architectural Model
Fault tolerant distributed protocols typically utilize a homogeneous fault model, either fail-crash or fail-Byzantine, where all processors are assumed to fail in the same manner....
Marco Serafini, Neeraj Suri
PPAM
2007
Springer
16 years 19 days ago
Parallel Tiled QR Factorization for Multicore Architectures
As multicore systems continue to gain ground in the High Performance Computing world, linear algebra algorithms have to be reformulated or new algorithms have to be developed in or...
Alfredo Buttari, Julien Langou, Jakub Kurzak, Jack...
ISCA
2005
IEEE
126views Hardware» more  ISCA 2005»
16 years 3 days ago
A Tree Based Router Search Engine Architecture with Single Port Memories
Pipelined forwarding engines are used in core routers to meet speed demands. Tree-based searches are pipelined across a number of stages to achieve high throughput, but this resul...
Florin Baboescu, Dean M. Tullsen, Grigore Rosu, Su...
ISCA
2005
IEEE
81views Hardware» more  ISCA 2005»
16 years 3 days ago
The Impact of Performance Asymmetry in Emerging Multicore Architectures
Performance asymmetry in multicore architectures arises when individual cores have different performance. Building such multicore processors is desirable because many simple cores...
Saisanthosh Balakrishnan, Ravi Rajwar, Michael Upt...