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» Processor Architectures for Ontogenesis
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VLSI
2007
Springer
16 years 19 days ago
Simulation of hybrid computer architectures: simulators, methodologies and recommendations
— In the future, high performance computing systems may consist of multiple multicore processors and reconfigurable logic coprocessors. Industry trends indicate that such coproc...
Pranav Vaidya, Jaehwan John Lee
DFT
2006
IEEE
74views VLSI» more  DFT 2006»
16 years 17 days ago
Recovery Mechanisms for Dual Core Architectures
Dual core architectures are commonly used to establish fault tolerance on the node level. Since comparison is usually performed for the outputs only, no precise diagnostic informa...
Christian El Salloum, Andreas Steininger, Peter Tu...
ISCAS
2005
IEEE
152views Hardware» more  ISCAS 2005»
16 years 3 days ago
Dictionary-based program compression on transport triggered architectures
— Program code size has become a critical design constraint of embedded systems. Large program codes require large memories, which increase the size and cost of the chip. Poor co...
Jari Heikkinen, Andrea G. M. Cilio, Jarmo Takala, ...
CASES
2003
ACM
15 years 11 months ago
Architectural optimizations for low-power, real-time speech recognition
The proliferation of computing technology to low power domains such as hand–held devices has lead to increased interest in portable interface technologies, with particular inter...
Rajeev Krishna, Scott A. Mahlke, Todd M. Austin
HOTI
2002
IEEE
15 years 11 months ago
Architecture and Hardware for Scheduling Gigabit Packet Streams
We present an architecture and hardware for scheduling gigabit packet streams in server clusters that combines a Network Processor datapath and an FPGA for use in server NICs and ...
Raj Krishnamurthy, Sudhakar Yalamanchili, Karsten ...