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» Processor Architectures for Ontogenesis
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ANCS
2009
ACM
15 years 4 months ago
An adaptive hash-based multilayer scheduler for L7-filter on a highly threaded hierarchical multi-core server
Ubiquitous multi-core-based web servers and edge routers are increasingly popular in deploying computationally intensive Deep Packet Inspection (DPI) programs. Previous work has s...
Danhua Guo, Guangdeng Liao, Laxmi N. Bhuyan, Bin L...
HPCA
2011
IEEE
14 years 10 months ago
Archipelago: A polymorphic cache design for enabling robust near-threshold operation
Extreme technology integration in the sub-micron regime comes with a rapid rise in heat dissipation and power density for modern processors. Dynamic voltage scaling is a widely us...
Amin Ansari, Shuguang Feng, Shantanu Gupta, Scott ...
DATE
2008
IEEE
182views Hardware» more  DATE 2008»
16 years 1 months ago
An adaptable FPGA-based System for Regular Expression Matching
In many applications string pattern matching is one of the most intensive tasks in terms of computation time and memory accesses. Network Intrusion Detection Systems and DNA Seque...
Ivano Bonesana, Marco Paolieri, Marco D. Santambro...
LCPC
2007
Springer
16 years 20 days ago
Revisiting SIMD Programming
Massively parallel SIMD array architectures are making their way into embedded processors. In these architectures, a number of identical processing elements having small private st...
Anton Lokhmotov, Benedict R. Gaster, Alan Mycroft,...
DATE
2004
IEEE
146views Hardware» more  DATE 2004»
15 years 10 months ago
Analyzing On-Chip Communication in a MPSoC Environment
This work focuses on communication architecture analysis for multi-processor Systems-on-Chips (MPSoCs), and it leverages a SystemC-based platform to simulate a complete multi-proc...
Mirko Loghi, Federico Angiolini, Davide Bertozzi, ...